The more bits per cell you store, the more dense and therefore cheaper your flash chips can be for a give capacity. The downside is that it is slower and less reliable since you have to be able to write and read exponentially more voltage states per cell, e.g. 2 states for SLC, 4 states for MLC, 8 states for TLC, etc.
NAND interfaces. From what I understand of it, it determines how efficiently you can pack storage into an SSD, but at the cost of some reliability. SLC, MLC and TLC are all considered pretty reliable. QLC, being a newer interface, is not quite as stable